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FPGA Voting Machine

A Verilog voting-machine implementation maintained as a digital-systems hardware project.

Status
Hardware coursework
Role
Implemented and documented the FPGA coursework repository; detailed claims are intentionally limited because the public repository has no explanatory README.
Digital systems · FPGA2026
  1. 01Verilog
  2. 02FPGA
  3. 03Digital logic
High-level flow only. Open the case study for decisions, evidence, and limitations.

The project translates stateful voting and tally behavior into synthesizable digital logic.